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september 2004 RMPA0951AT ?004 fairchild semiconductor corporation RMPA0951AT rev. d RMPA0951AT 3v cellular cdma poweredge power amplifier module general description the RMPA0951AT is a dual mode, small-outline power amplifier module (pam) for cellular cdma personal communication system applications. the pa is internally- matched to 50 ? and dc blocked which minimizes the use of external components and reduces circuit complexity for system designers. high amps/cdma efficiency and good linearity are achieved using our ingap heterojunction bipolar transistor (hbt) process. features single positive-supply operation high dual-mode (amps/cdma) efficiency excellent linearity small size: 6.0 x 6.0 x 1.5 mm 3 lcc package ?0 ? matched input and output module adjustable quiescent current and power-down mode suitable for cdma and cdma2000 1x systems absolute ratings 1 notes: 1: no permanent damage with only one parameter set at extreme limit and other parameters typical. 2: typical rf input powers for (+28dbm, cdma) is -3dbm and for (+31dbm, amps) is +2dbm. symbol parameter ratings units vc1, vc2 supply voltage 6.0 v vref reference voltage 1.5 to 4.0 v pin rf input power 2 +7 dbm vswr load vswr 6:1 tc case operating temperature -30 to +85 ? tstg storage temperature -55 to +150 ? device
?004 fairchild semiconductor corporation RMPA0951AT rev. d RMPA0951AT electrical characteristics 3 notes: 3: all parameters to be met at ta = +25?, vcc = +3.4v, vref = 3.0v and load vswr 1.2:1. 4: load vswr 6:1 all phase angles. 5: cdma waveform measured using the ratio of the average power within the 1.23 mhz signal channel to the power within a 30 khz res olution bandwidth, at a 885 khz offset, pout = 28dbm, offset is ?85 khz, ?.98 mhz. 6: no applied rf signal. vcc = +3.4v nominal, vref = +0.2v maximum. 7: guaranteed by design. p arameter min typ max units f requency range 824 849 mhz gain (pout = +28dbm) 30 db gain (pout = +31dbm) 29 db analog output power 31 dbm po w er-added ef?iency cdma (pout = +28dbm) analog (pout = +31.5dbm) 32 44 35 50 % % a cpr1 5 -52 -46 dbc a cpr2 5 -58 -55 dbc rx-band noise power (all power levels) -135 dbm/hz noise figure 3 db input vswr (50 ? ) 1.5:1 2.5:1 output vswr (50 ? ) 2.5:1 stability (all spurious) 4,7 -60 dbc harmonics (po < 28dbm) 2fo, 3fo, 4fo 7 -30 dbc quiescent current 80 120 ma po w er shutdown current 6 210a vcc 3.0 3.4 4.0 v vref 2.0 3.0 3.2 v iref 16 ma
?004 fairchild semiconductor corporation RMPA0951AT rev. d RMPA0951AT figure 1. package outline and pin designations figure 2. functional block diagram 6.00 6.00 typ. 6.01 max. 6.00 typ. 6.01 max. 1.499 typ. 1.60 max. 5.01 i/o 1 indicator dimensions in mm pa0951at ppyyww u31xx 1 2 3 6 5 1. 4 .004 4.25 3.36 2.64 0.99 0.10 metal pull back all around 0.00 5.25 5.01 3.36 2.64 1.07 0.85 0.00 0.91 0.00 1.09 1.74 3.72 4.25 4.91 6.00 5.01 4x r.045 1 2 3 6 5 7 4 pin # description 1 vcc1 2 rf in 3 vref 4 vcc2 5 rf out 6 n/c 7 gnd (topside view) collector bias 1 input stage mmic input stage bias output stage bias reference adjust collector bias 2 output stage gnd (pin 7)- (package bias) input matching network output matching network interstage match vcc1 (1) rf in (2) vref (3) n/c (6) rf out (5) vcc=3.4v (nom) vref=3.0v (nom) 824-849 mhz 50 ? i/o vcc2 (4) pa module
?004 fairchild semiconductor corporation RMPA0951AT rev. d RMPA0951AT with device marking oriented right side up, rf in is on the left and rf out is on the right. vcc = +3.4v nominal. vref = +3.0v nominal to obtain iccq = 80 ma. operation at lower or higher quiescent currents can be achieved by decreasing or increasing vref voltage relative to +3.0v. first ground the pcb (gnd terminal) and apply +3.4v to the collector supply terminals (vcc1, vcc2). next apply +3.0v to the reference supply (vref terminal). quiescent collector current with no rf applied will be about 80 ma. reference supply current with or without rf applied will be about 15 ma. when turning amplifier off, reverse power supply sequence. apply -20dbm rf input power at cellular frequency (824-849 mhz). after making any initial small signal measurements at this drive level, input power may be increased up to a maximum of +7dbm for large signal, analog (amps) or digital cdma measurements. do not exceed +7dbm input power. figure 3. evaluation board layout and instructions pcb schematic figure 4. evaluation board schematic vcc1 vref vcc2 pcb specifications: material: rogers r04003 dimensions: 2.0"x1.5"x0.032" metallization: 1/2 oz copper cladding c1* 3.3 f c2* 3.3 f (package base) * minimum bypass capacitance recommended for best linearity/low-noise performance. note: addition of c3 bypass capacitor on vref pin recommended to minimize rx band noise 1 2 3 6 5 4 7 c3* 1000 pf vcc1 vcc2 n/c 50 ? trl RMPA0951AT 50 ? trl vref sma1 rf in sma2 rf out
?004 fairchild semiconductor corporation RMPA0951AT rev. d RMPA0951AT application information precautions to avoid permanent device damage: cleanliness: observe proper handling procedures to ensure clean devices and pcbs. devices should remain in their original packaging until component placement to ensure no contamination or damage to rf, dc & ground contact areas. device cleaning: standard board cleaning techniques should not present device problems provided that the boards are properly dried to remove solvents or water residues. static sensitivity: follow esd precautions to protect against esd damage: ? properly grounded static-dissipative surface on which to place devices. static-dissipative floor or mat. ? properly grounded conductive wrist strap for each person to wear while handling devices. general handling: handle the package on the top with a vacuum collet or along the edges with a sharp pair of bent tweezers. avoiding damaging the rf, dc, & ground contacts on the package bottom. do not apply excessive pressure to the top of the lid. device storage: devices are supplied in heat-sealed, moisture-barrier bags. in this condition, devices are protected and require no special storage conditions. once the sealed bag has been opened, devices should be stored in a dry nitrogen environment. device usage: fairchild recommends the following procedures prior to assembly. dry-bake devices at 125? for 24 hours minimum. note: the shipping trays cannot withstand 125? baking temperature. assemble the dry-baked devices within 7 days of removal from the oven. during the 7-day period, the devices must be stored in an environment of less than 60% relative humidity and a maximum temperature of 30? if the 7-day period or the environmental conditions have been exceeded, then the dry-bake procedure must be repeated. solder materials & temperature profile: reflow soldering is the preferred method of smt attachment. hand soldering is not recommended. reflow profile ramp-up: during this stage the solvents are evaporated from the solder paste. care should be taken to prevent rapid oxidation (or paste slump) and solder bursts caused by violent solvent out-gassing. a typical heating rate is 1 - 2?/sec. pre-heat/soak: the soak temperature stage serves two purposes; the flux is activated and the board and devices achieve a uniform temperature. the recommended soak condition is: 120 -150 seconds at 150?. reflow zone: if the temperature is too high, then devices may be damaged by mechanical stress due to thermal mismatch or there may be problems due to excessive solder oxidation. excessive time at temperature can enhance the formation of inter-metallic compounds at the lead/board interface and may lead to early mechanical failure of the joint. reflow must occur prior to the flux being completely driven off. the duration of peak reflow temperature should not exceed 10 seconds. maximum soldering temperatures should be in the range 215 -220?, with a maximum limit of 225?. cooling zone: steep thermal gradients may give rise to excessive thermal shock. however, rapid cooling promotes a finer grain structure and a more crack- resistant solder joint. figure 4 indicates the recommended soldering profile. solder joint characteristics: proper operation of this device depends on a reliable void- free attachment of the heatsink to the pwb. the solder joint should be 95% void-free and be a consistent thickness. rework considerations: rework of a device attached to a board is limited to reflow of the solder with a heat gun. the device should not be subjected to more than 225? and reflow solder in the molten state for more than 5 seconds. no more than 2 rework operations should be performed.
?004 fairchild semiconductor corporation RMPA0951AT rev. d RMPA0951AT figure 5. recommended solder reflow profile 0 20 40 60 80 100 120 140 deg ( c) time (sec) 10 sec 183 c 1 c/sec 1 c/sec soak at 150 c for 60 sec 45 sec (max) above 183 c 160 180 200 220 240 060 120 180 240 300
?004 fairchild semiconductor corporation RMPA0951AT rev. d RMPA0951AT typical characteristics measured performance for typical production amplifiers is represented in the figures below. key characteristics such as gain, efficiency, output power and linearity are shown for both amps and cdma operation. 25.00 26.00 27.00 28.00 29.00 30.00 31.00 32.00 +25 c, -30 c +85 c 33.00 34.00 35.00 0.0 4.0 8.0 12.0 16.0 20.0 24.0 28.0 output power (dbm) frequency (mhz) RMPA0951AT cdma gain vs pout, frequency and temperature RMPA0951AT pae vs. output power (vcc = 3.4v, f = 836.5mhz, tc = 25 c) note: 31.5dbm is single-tone cw RMPA0951AT icc vs. vref and pout (vcc = 3.4v, f = 836.5mhz, tc = 25 c) note: 31.5dbm is single-tone cw RMPA0951AT adjacent channel power ratio vs output power (vcc = 3.4v, vref = 3.0v, ta = +25 c) RMPA0951AT vcc = 3.4v, vref = 3.0v, pout = 28dbm, cdma modulation total current vs freq and temp RMPA0951AT amps mode gain vs temperature/frequency (pout = 31.5dbm cw) RMPA0951AT vcc = 3.4v, vref = 3.0v, pout = 31.5dbm cw total current vs freq and temp RMPA0951AT vcc = 3.4v, vref = 3.0v, pout = 28dbm cdma modulation acpr1 @ 885khz, acpr2 @ 1.98mhz vs frequency and temperature gain (db) 824 mhz (+25c) 836.5 mhz (+25c) 849 mhz (+25c) 824 mhz (+85c) 836.5 mhz (+85c) 849 mhz (+85c) 824 mhz (-30c) 836.5 mhz (-30c) 849 mhz (-30c) 400.0 420.0 440.0 460.0 480.0 500.0 520.0 540.0 560.0 580.0 600.0 824.0 826.5 829.0 831.0 834.0 836.0 839.0 841.0 844.0 846.0 849.0 icc + iref (ma) -30c +25c +85c 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 50.0 0.0 4.0 8.0 12.0 16.0 20.0 24.0 28.0 32.0 output power (dbm) pae (%) 2.0vref 2.1vref 2.2vref 2.3vref 2.4vref 2.5vref 2.6vref 2.7vref 2.8vref 2.9vref 3.0vref 25.0 26.0 27.0 28.0 29.0 30.0 31.0 32.0 33.0 34.0 35.0 824.0 826.5 829.0 831.5 834.0 836.5 839.0 841.5 844.0 846.5 849.0 frequency (mhz) 824.0 826.5 829.0 831.5 834.0 836.5 839.0 841.5 844.0 846.5 849.0 frequency (mhz) 824.0 826.5 829.0 831.5 834.0 836.5 839.0 841.5 844.0 846.5 849.0 frequency (mhz) gain (db) icc + iref (ma) 0 100 200 300 400 500 600 700 800 900 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 vref (v) icc (ma) p-out=+4dbm p-out=+16dbm p-out=+24dbm p-out=+28dbm p-out=+31.5dbm -30c +25c +85c 700.0 720.0 740.0 760.0 780.0 800.0 820.0 840.0 860.0 880.0 900.0 -30c +25c +85c -80.00 -75.00 -70.00 -65.00 -60.00 -55.00 -50.00 -45.00 -40.00 4.0 8.0 12.0 16.0 20.0 24.0 28.0 pout (dbm) acpr1/acpr2 (dbc) - offset: 885 khz and 1.98 mhz 824 mhz acpr1 824 mhz acpr2 836.5 mhz acpr1 836.5 mhz acpr2 849 mhz acpr1 849 mhz acpr2 -65.00 -63.00 -61.00 -59.00 -57.00 -55.00 -53.00 -51.00 -49.00 -47.00 -45.00 acpr1,2 (dbc) acpr1 -30c acpr1 +25c acpr1 +85c acpr2 -30c acpr2 +25c acpr2 +85c acpr1 acpr2
?004 fairchild semiconductor corporation RMPA0951AT rev. d RMPA0951AT dc power management for reduced-power operating modes many cellular/pcs handsets can benefit from gain control and dc power management to optimize transmitter performance while operating at backed-off output power levels. oftentimes, cellular systems will operate at 10-20db back-off from maximum-rated linear power and peak power-added efficiency. the ability to reduce current consumption under these conditions, without sacrificing linearity, is critical to extending battery life in nextgeneration mobile phones. the RMPA0951AT pa offers the ability to lower quiescent current by more than 60 percent and small-signal gain by 10- 12db using a single control voltage (vref). even with the amplifier biased for lowest current consumption, high linearity is maintained over the full operating temperature range and at output power levels up to +16dbm. bias and gain control through vref provides complete flexibility for the handset designer, allowing the user to define the operation by either an analog (continuously-variable) or digital (discrete-step) voltage input. as an example, reducing the vref voltage from 3.0v (nominal) to 2.2v can lower pa current consumption by more than 20 percent at an output power of +12dbm. the following charts demonstrate analog and digital control techniques for minimizing dc power consumption at reduced rf output power levels. the first four graphs characterize analog control over a reference voltage (vref) range of 1.8v to 3.0v. using analog bias control, quiescent current is reduced to less than 30 ma and small-signal gain is reduced by 12db at vref = 1.8v. operating current at +12dbm is also reduced by 20 percent (25 ma) at vref = 2.2v and by more than 50 percent (50 ma) at the lowest reference voltage (vref =1.8v) compared with fixedbias operation at vref = 3.0v. in all cases, dc current savings is achieved while fully complying with is-95 linearity requirements. the last four graphs feature digital control performance using three discrete voltage levels (3.0v, 2.2v, 1.8v) to optimize linear pa performance over three output power ranges (< +4dbm, +4dbm to +16dbm, >+16dbm). alternate output power ranges can be selected depending on the power-probability use in the cellular system. cellular pam-digital control mode p arameter min typ max units conditions low-power range current gain linearity 50 24 -50 +8 dbm ma db dbc vref = 1.8v typ mid-power range current gain linearity +8 +12 120 28.5 -50 +16 dbm ma db dbc vref = 2.2v typ high-power range current gain linearity +16 540 32.5 -38 +28 dbm ma db dbc vref = 3.0v typ p out = +28dbm
?004 fairchild semiconductor corporation RMPA0951AT rev. d RMPA0951AT 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 vref (v) 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 vref (v) output power (dbm) 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 vref (v) total quiescent current (ma) nominal iccq 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 pae (%) nominal pae 20.0 22.0 24.0 26.0 28.0 30.0 32.0 small-signal gain (db) nominal gain 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 110.0 120.0 130.0 140.0 150.0 160.0 170.0 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 total current (ma) 3.0 vref 2.9 vref 2.8 vref 2.7 vref 2.6 vref 2.5 vref 2.4 vref 2.3 vref 2.2 vref 2.1 vref 2.0 vref 0.0 100.0 200.0 300.0 400.0 500.0 600.0 0.0 4.0 8.0 12.0 16.0 20.0 24.0 28.0 pout (dbm) 0.0 4.0 8.0 12.0 16.0 20.0 24.0 28.0 pout (dbm) 0.0 4.0 8.0 12.0 16.0 20.0 24.0 28.0 pout (dbm) icc + iref (ma) icc + iref (ma) low- power low- power mid-power mid-power low- power mid-power high-power low- power mid-power high-power hi gh-power vref=1.8v vref=1.8v vref=1.8v vref=1.8v vref=2.2v vref=2.2v vref=2.2v vref=2.2v vref=3.0v vref=3.0v vref=3.0v -30c vref 1.8v +25c vref 1.8v +85c vref 1.8v -30c vref 2.2v +25c vref 2.2v +85c vref 2.2v -30c vref 3.0v +25c vref 3.0v +85c vref 3.0v vref=3.0v 200.0 160.0 120.0 80.0 40.0 0.0 0.0 4.0 8.0 12.0 16.0 pout (dbm) -30c vref 1.8v +25c vref 1.8v +85c vref 1.8v -30c vref 2.2v +25c vref 2.2v +85c vref 2.2v -30c vref 3.0v +25c vref 3.0v +85c vref 3.0v 10.0 15.0 20.0 25.0 30.0 35.0 gain (db) -70.00 -65.00 -60.00 -55.00 -50.00 -45.00 -40.00 acpr1 (dbc) -30c vref 1.8v +25c vref 1.8v +85c vref 1.8v -30c vref 2.2v +25c vref 2.2v +85c vref 2.2v -30c vref 3.0v +25c vref 3.0v +85c vref 3.0v -30c vref 1.8v +25c vref 1.8v +85c vref 1.8v -30c vref 2.2v +25c vref 2.2v +85c vref 2.2v -30c vref 3.0v +25c vref 3.0v +85c vref 3.0v RMPA0951AT total quiescent current (icc + iref) vs. reference voltage (vcc=3.4v, tc=+25 c) RMPA0951AT pae vs. vref at pout=+16dbm (vcc=3.4v, f=836.5mhz, tc=25 c) RMPA0951AT small-signal gain vs. reference voltage (vcc=3.4v, f=836.5mhz, pout=0 dbm, tc=25 c) RMPA0951AT total current (icc + iref) vs. output power and vref (vcc=3.4v, f=836.5 mhz, tc=25 c) RMPA0951AT total current (icc + iref) vs reference voltage and temperature (vcc=3.4v, f=836.5mhz, pout=0 dbm) RMPA0951AT freq=836.5 mhz, vcc=3.4v total current (icc + iref) vs pout and temp (digital control) RMPA0951AT freq=836.5 mhz, vcc=3.4v gain vs pout and temp (digital control) RMPA0951AT freq=836.5 mhz, vcc=3.4v acpr1 vs pout and temp (digital control)
?004 fairchild semiconductor corporation RMPA0951AT rev. d RMPA0951AT 0.0 4.0 8.0 12.0 16.0 20.0 24.0 28.0 pout (dbm) low- power mid-power high-power vref=1.8v vref=2.2v vref=3.0v RMPA0951AT freq=836.5 mhz, vcc=3.4v gain vs pout and temp (digital control) -80.00 -75.00 -70.00 -65.00 -60.00 -55.00 -50.00 acpr2 (dbc) -30c vref 1.8v +25c vref 1.8v +85c vref 1.8v -30c vref 2.2v +25c vref 2.2v +85c vref 2.2v -30c vref 3.0v +25c vref 3.0v +85c vref 3.0v
disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production isoplanar? littlefet? microcoupler? microfet? micropak? microwire? msx? msxpro? ocx? ocxpro? optologic ? optoplanar? pacman? pop? fast ? fastr? fps? frfet? globaloptoisolator? gto? hisec? i 2 c? i-lo ? implieddisconnect? rev. i13 acex? activearray? bottomless? coolfet? crossvolt ? dome? ecospark? e 2 cmos? ensigna? fact? fact quiet series? power247? poweredge? powersaver? powertrench ? qfet ? qs? qt optoelectronics? quiet series? rapidconfigure? rapidconnect? serdes? silent switcher ? smart start? spm? stealth? superfet? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic ? tinyopto? trutranslation? uhc? ultrafet ? vcx? across the board. around the world.? the power franchise ? programmable active droop?

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